1. Field of the Invention
The invention relates to audio devices, and in particular, to a Delta-Sigma DAC outputting audio signals.
2. Description of the Related Art
FIG. 1 shows a conventional Delta-Sigma DAC for converting a 16-bit digital signal to an analog audio signal Vout. The Delta-Sigma technique is popular because it achieves high resolution and quality with effective hardware implementations. A typical Delta-Sigma DAC comprises an interpolator 110, a Delta-Sigma modulator 120 and a FIR filter 130. The interpolator 110 receives an n-bit digital signal at a first sampling rate, and performs an interpolation to generate an n-bit output signal at a second, higher sampling rate. The Delta-Sigma modulator 120 receives the output signal from interpolator 110 and shapes the quantization noises therein, thereby generating a shaped signal as a substantially linear analog representation of the 16-bit digital signal within a pass band. The FIR filter 130 then filters the shaped signal to eliminate out-of-band high frequency noises, and generates the analog audio signal Vout. The FIR filter 130 typically comprises a shift register 132 comprising a plurality of delay units 134, a plurality of weighting units 136 corresponding to each delay units 134, and a summing device 138 coupled to the outputs of weighting units 136. The shaped signal is serially delayed by the delay units 134. The weighting units 136 jointly serve as a weighting function to leverage the outputs from each delay units 134, and the summing device 138 sums the outputs from weighting units 136 to generate the analog audio signal Vout.
FIG. 2 shows a conventional FIR filter 200. A plurality of current sinks 204 are provided, each providing a different current as a weighting coefficient. A plurality of switches 202 direct the currents to a node A or a node B according to corresponding values output from the delay units 134. In this way, a first current Ia and a second current Ib are respectively formed on the node A and node B, representing the audio signal as a differential current pair. The current source 206 and current source 208 compensate the current offsets on the nodes A and B, thus, the first current Ia and second current Ib are bidirectional. The current to voltage converters 210 and 220, driven by a reference voltage Vref, then convert the first current Ia and second current Ib to a first voltage Va and a second voltage Vb, and the subtracter 230 subtracts the first voltage Va and second voltage Vb to obtain the analog audio signal Vout. Conventionally, four OP amplifiers (not shown) are required to implement the reference voltage Vref, current to voltage converter 210, current to voltage converter 220 and subtracter 230. The OP amplifiers dominate area consumption in a chip, and contribute 1/f noises that induce SNR performance hits. An implementation requiring less OP amplifiers is therefore desirable.